New BICS members Nikhil Garg and Muath Abulebdeh

Nikhil Garg is interested in building energy-efficient intelligent systems by combining neuromorphic algorithms with emerging memory devices and mixed-signal hardware. He earned his B.Eng. in Electrical and Electronics Engineering and his M.Sc. in Biological Sciences from the Birla Institute of Technology and Science Pilani, India, in 2021. He completed a joint Ph.D. in 2024 between Université de Lille (France) and Université de Sherbrooke (Canada), carrying out his research at CNRS laboratories—the Institute of Electronics, Microelectronics and Nanotechnology (IEMN) and the Interdisciplinary Institute for Technological Innovation (3IT). His doctoral work focused on neuromorphic systems based on nanoscale memristive devices, spanning learning algorithms, mixed-signal circuits, and system-level co-design. From 2025 to 2026, he was a postdoctoral researcher at ETH Zurich (D-ITET), working with the Integrated Systems Laboratory and the Neuromorphic Electronics with Oxides group on neuromorphic hardware using ferroelectric devices and emerging in-memory computing technologies.

As part of the Stochastic Spiking Wireless Multimodal Sensory Systems (SWIMS) ERC Synergy project, Nikhil will work on system-level modelling and simulation of wireless multimodal neuromorphic sensory nodes. He will study sensing–compute–communication tradeoffs to guide energy-efficient system design. His goal is to integrate device/circuit capabilities into practical, benchmarked architectures for smart event-driven sensing at the edge.

Muath Abulebdeh’s experience is centered around computer hardware, with a primary focus on the design and utilization of memory systems. He earned his BSc in Electrical & Electronic Engineering and MSc in Electrical & Computer Engineering from Khalifa University in the UAE, and his PhD in Information Engineering & Computer Science from the University of Trento in Italy. Muath is interested in biologically-inspired circuits and systems.

His post-doctoral research is part of the memTED project, in which he is involved in investigating memristive and CMOS circuits for implementing time difference encoders.