Methods and design for analog computing architectures

The Internet heavily relies on packet processors for establishing the communication links between senders and receivers of network traffic. Despite their promising performance, the current generation of packet processors consume a huge amount of energy and provide limited support for more expressive functions like brain-inspired cognitive computing models. The major reason is the underlying transistor-based technology, which builds on digital computations and requires energy-intensive data movements between storage and computational units inside these components. In his research, Saad Saleh shows that the recent emerging technologies from the analog domain, especially Memristors, have a huge potential for increasing energy efficiency and supporting cognitive functions in packet processors.

Saleh proposes an analog architecture for packet processors in order to support energy-efficient and cognitive functions in computer networks. Central to this design is a novel analog memory abstraction called Probabilistic Content Addressable Memory (pCAM). It provides both digital and analog outputs for supporting more expressive functions in packet processors. In order to support traditional digital operations, Saleh proposes a novel memristor-based TCAM memory. Building on analog computations, he further proposes a congestion control mechanism, called derivative-based active queue management (dAQM), for better management of network traffic. 

Saleh analyzed the performance of the proposed analog architecture over a physically fabricated Nb-doped SrTiO3 memristor chip. The results showed that analog processing consumes up to 50 times less energy than digital processing. Moreover, the analog dAQM function provides up to 39.7% better performance than the state-of-the-art algorithms.

Dissertation: https://hdl.handle.net/11370/ad302a85-b3dd-4589-9de7-5506aa2f7110